Pardis Novel Processing Technology Company:
Winter 2007, Design and FPGA implementation of ASI to STM1 digital interface and Vise Versa.
Fall 2007, Design and FPGA implementation of G.703 to STM1 digital interface and Vise Versa.
November 2006 – March 2007, R&D Engineer, Digital Design Section of Pardis Novel Processing Technology Company, Tehran, Iran.
University of Tehran:
Fall 2004 – fall 2005, Technical Study, Design and FPGA Implementation of PCI Express Standard. Primary Investigator: Dr. Ali Afzali-Kusha.,Funding Agency: High technology Industries Center.
Resana-Afzar Sharif Company:
Summer 2002, Design and hardware test of answering machine for phone line.
Fall 2002, Design and FPGA implementation of a SRAM Controller for Data Logger.
April 2003 – September 2003, R&D Engineer, Digital Design Section of Resana Afzar Sharif Company Ltd., Tehran, Iran.